Uplink wireless systems for next-generation mobile communication need to accomplish high transmission power efficiency so as to allow terminals to have a wide coverage. Thus, a single carrier system that suppresses the PAPR (Peak to Average Power Ratio) has been regarded as the most likely candidate to the next-generation mobile communication systems.
Although it is important for the next-generation mobile communication systems to accomplish high speed data transmission, if high speed data transmission is performed using a single carrier signal, a drawback of inter-symbol interferences due to multipath, namely multipath interferences, will arise.
Although multipath interferences are suppressed by various techniques, as a relative simple technique, a linier equalizer can be used. A frequency equalizer that performs a linear equalizing process that is a frequency domain signal process and thereby remarkably reduces the amount of computation has been proposed (for example, refer to Non-patent Literature 1).
The structure of single carrier receiving device 100 disclosed in Non-patent Literature 1 is shown in FIG. 1. Single carrier receiving device 100 disclosed in Non-patent Literature 1 is composed of receiving antenna 101, cyclic prefix (CP) removing section 102, discrete Fourier transform (DFT) section 103, channel estimating section 104, weight computing section 105, equalizing filter 106, inverse discrete Fourier transform (IDFT) section 107, bit likelihood computing section 108, and decoder 109.
As shown in FIG. 1, an output of CP removing section 102 is connected to DFT section 103 through a signal line. Outputs of DFT section 103 are connected to equalizing filter 106 and channel estimating section 104 through respective signal lines. Outputs of channel estimating section 104 are connected to weight computing section 105 through respective signal lines. Outputs of weight computing section 105 are connected to equalizing filter 106 through respective signal lines. Outputs of equalizing filter 106 are connected to IDFT section 107 through respective signal lines. An output of IDFT section 107 is connected to bit likelihood computing section 108 through a signal line. An output of bit likelihood computing section 108 is connected to decoder 109 through a signal line.
Next, the operations of individual structural sections of receiving device 100 will be described.
Receiving antenna 101 receives a time domain single carrier signal.
CP removing section 102 inputs the time domain single carrier signal received from receiving antenna 101 and removes a portion corresponding to the CP from the time domain single carrier signal.
DFT section 103 inputs the received signal from which the CP was removed by CP removing section 102, performs an NDFT-point DFT (where NDFT is an integer equal to or greater than 2), and outputs frequency domain subcarriers k (where 1≦k≦NDFT) transformed from the received signal.
Channel estimating section 104 inputs the frequency domain subcarriers k as received reference signals transformed by DFT section 103 and performs a correlating process for the received input signals and a pre-stored reference signal so as to obtain estimated channel values.
For example, estimated channel values H(k) of subcarriers k are computed as follows.H(k)=RRS(k)X*(k)  (1)where X(k) are the reference signals, RRS(k) are the received reference signals transformed into frequency domain signals by DFT section 103, and superscript * represents a complex conjugate.
Weight computing section 105 inputs the estimated channel values of the frequency domain subcarriers k estimated by channel estimating section 104 and computes equalized weights. The equalized weights are computed by weight computing section 105 generally according to the minimum mean square error (MMSE) technique. MMSE weights W(k) of subcarriers k are computed based on the estimated channel values H(k) as follows.W(k)=(H*(k))/(|H*(k)|2+σ2)  (2)where σ2 represents the noise power.
Equalizing filter 106 inputs the equalized weights computed by weight computing section 105 and the frequency domain subcarriers k transformed by DFT section 103 and multiplies the subcarriers by the equalized weights so as to perform an equalizing process for the frequency domain subcarriers k.
Assuming that the received data signals transformed by DFT section 103 are RD(k) and the equalized weights computed by weight computing section 105 are W(k), equalized signals Y(k) for which the equalizing process was performed by equalizing filter 106 are computed as follows.Y(k)=W(k)RD(k)  (3)
IDFT section 107 inputs the equalized signals of frequency domain subcarriers k equalized by equalizing filter 106 and performs an NIDFT-point IDFT (where NIDFT is an integer equal to or greater than 2) so as to transform the equalized signals into a time domain single carrier signal.
Bit likelihood computing section 108 inputs the equalized signal that is the time domain single carrier signal outputted from IDFT section 107 and computes the likelihood of each transmitted bit of the equalized signal. In the following, the computed bit-wise likelihood is referred to as the bit likelihood.
Decoder 109 inputs the bit likelihood computed by bit likelihood computing section 108 and performs error correction decoding based on the bit likelihood.
Patent Literature 1 discloses a receiving device that performs single carrier transmission according to the diversity receiving. Non-patent Literature 1 and Patent Literature 1 are as follows.    Patent Literature 1: JP2001-308763A, Publication    Non-patent Literature 1: D. Falconer, S. L. Ariyavisitakul, A. Benyamin-Seeyar, and B. Eidson,“Frequency Domain Equalization for Single-Carrier Broadband Wireless Systems, “IEEE Commun. Mag., vol. 40, no. 4, pp. 58-66, April 2002.